At the time of the development of a printed circuit, the far electric field intensity of the printed circuit is evaluated by an EMC (electromagnetic compatibility) test and, when the far electric field intensity is out of the standard, an EMC measure is performed, and thereafter, the far electric field intensity of the printed circuit is reevaluated by the EMC test. Further, as the EMC measures, a noise source for the printed circuit is specified by the measurement of electromagnetic wave intensity (electric field intensity and/or magnetic field intensity) in a near field, and a noise reduction measure is performed for the specified noise source.
At the time of the development of the printed circuit, the above is performed, and the far electric field intensity sometimes cannot be placed within the standard, without performing the EMC measure multiple times, in other words, unnecessary EMC tests are sometimes performed multiple times. The EMC test is a test for which a special large-size facility is necessary and which takes many steps to carry out it, and therefore, there have been proposed various technologies (for example, see Patent Literature 1) for calculating (estimating) the far electric field intensity from the measurement result for the electromagnetic wave intensity in the near field. However, in the existing status, there has still not been developed a technology that makes it possible to calculate the far electric field intensity of the printed circuit from the electromagnetic wave intensity of the printed circuit in the near field simply (in a manner in which a complex computation is not necessary).